National Technical University of Athens
Department of Electrical and Computer Engineering
Microelectronic Circuit Design Group


Research areas
Research projects
Recent publications


Research areas


Research projects

The group participates in european and national research projects:


Recent publications


2008

  1. M. Bucher, A. Bazigos, "An efficient channel segmentation approach for a large-signal NQS MOSFET model Solid-State Electronics," Solid-State Electronics, vol. 52, issue 2, pp. 275-281, feb. 2008.
  2. M. Bucher, A. Bazigos, S. Yoshitomi, N. Itoh, "A Scalable Advanced RF IC Design-Oriented MOSFET Model," International Journal of RF and Microwave Computer Aided Engineering, (to be published).

2007

  1. G. Theodoratos, Y. Papananos, and G. Vitzilaios, "A low-voltage 5-GHz downconversion mixer employing a second harmonic injection linearization technique," IEEE Trans. Circuits Syst. II, vol. 54, pp. 964-968, Nov. 2007.
  2. K. S. Vryssas and A. Samelis, "Behavioral modeling of power amplifiers for wireless applications," International Journal of RF and Microwave Computer-Aided Engineering, vol. 17, pp. 480-492, Sep. 2007.
  3. S. Yoshitomi, A. Bazigos, and M. Bucher, "EKV3 parameter extraction and characterization of 90nm RF-CMOS technology," in Proc. 2007 IEEE International Conference on Mixed Design of Integrated Circuits and Systems, June 2007, pp. 74-79.
  4. M. Bucher, A. Bazigos, and W. Grabinski, "Determining MOSFET parameters in moderate inversion," in Proc. 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems, Apr. 2007, pp. 1-4.

2006

  1. G. Vitzilaios, Y. Papananos, G. Theodoratos, and K. S. Vryssas, "Magnetic-feedback-based predistortion method for low-noise amplifier linearization," IEEE Trans. Circuits Syst. II, vol. 53, pp. 1441-1445, Dec. 2006.
  2. G. Vitzilaios, Y. Papananos, G. Theodoratos, and A. Vasilopoulos, "A 1-V, 5.5-GHz, CMOS LNA with multiple magnetic feedback," IEEE Trans. Circuits Syst. II, vol. 53, pp. 971-975, Sep. 2006.
  3. A. Vasilopoulos, G. Vitzilaios, G. Theodoratos, and Y. Papananos, "A low-power wideband reconfigurable integrated active-RC filter with 73 dB SFDR," IEEE J. Solid-State Circuits, vol. 41, pp. 1997-2008, Sep. 2006.
  4. N. Nastos and Y. Papananos, "RF operation of MOSFETs under integrated inductors," IEEE Trans. Microwave Theory Tech., vol. 54, pp. 2106-2117, May 2006.
  5. E. Kitonaki, A. Bazigos, M. Bucher, H. Puchner, S. Bhardwaj, and Y. Papananos, "Scaling issues in an 0.15�m CMOS technology with EKV3.0," in Proc. 2006 IEEE International Conference on Mixed Design of Integrated Circuits and System, June 2006, pp. 151-158.
  6. A. Vasilopoulos, Y. Papananos, A. Bazigos, and N. Nastos, "A user-friendly benchmark tool for MOS models," in Proc. 2006 IEEE International Conference on Mixed Design of Integrated Circuits and System, June 2006, pp. 147-150.
  7. G. Vitzilaios, Y. Papananos, G. Theodoratos, and A. Vasilopoulos, "A low-voltage CMOS LNA with multiple magnetic feedback for WLAN applications," in Proc. 2006 IEEE International Symposium on Circuits and Systems, May 2006, pp. 4503-4506.
  8. G. Theodoratos, A. Vasilopoulos, G. Vitzilaios, and Y. Papananos, "Calculating distortion in active CMOS mixers using Volterra series," in Proc. 2006 IEEE International Symposium on Circuits and Systems, May 2006, pp. 2249-2252.

2005

  1. N. Naskas and Y. Papananos, "Non-iterative adaptive baseband predistorter for RF power amplifier linearization," Proc. IEE Microwaves, Antennas and Propagation, vol. 152, pp. 103-110, Apr. 2005.
  2. S. Pipilos, Y. Papananos, N. Naskas, M. Zervakis, J. Jongsma, T. Gschier, N. Wilson, J. Gibbins, B. Carter, and G. Dann, "A transmitter IC for TETRA systems based on a Cartesian feedback loop linearization technique," IEEE J. Solid-State Circuits, vol. 40, pp. 707-718, Mar. 2005.
  3. K. Vryssas and A. Samelis, "Behavioral modeling of nonlinear radio-frequency power amplifiers," in Proc. 2005 Asia-Pacific Microwave Conference, Dec. 2005, vol. 1.
  4. A. Vasilopoulos, G. Vitzilaios, G. Theodoratos, and Y. Papananos, "A low-voltage, highly linear, integrated, active-RC filter," in Proc. 2005 IEEE Ph.D. Research in Microelectronics and Electronics Conference, July 2005, vol. 1, pp. 39-42.

2004

  1. N. Naskas and Y. Papananos, "A convergence-free predistortion technique for adaptive linearisation of RF power amplifiers," Springer Journal of Analog Integrated Circuits and Signal Processing, vol. 41, pp. 109-118, Dec. 2004.
  2. N. Naskas and Y. Papananos, "Neural-network-based adaptive baseband predistortion method for RF power amplifiers," IEEE Trans. Circuits Syst. II, vol. 51, pp. 619-623, Nov. 2004.
  3. E. Zervakis, Y. Papananos, D. Loukas, N. Haralabidis, and A. Pavlidis, "A high-counting-rate readout system for X-ray applications," IEEE Trans. Nucl. Sci., vol. 51, pp. 1840-1847, Aug. 2004.
  4. M. Bucher, A. Bazigos, N. Nastos, Y. Papananos, F. Krummenacher, and S. Yoshitomi, "Analysis of harmonic distortion in deep submicron CMOS," in Proc. 2004 IEEE International Conference on Electronics, Circuits and Systems, Dec. 2004, pp. 395-398.
  5. Y. Papananos and N. Nastos, "Inductor over MOSFET: Operation and theoretical study of a CMOS RF three-dimensional structure," in Proc. 2004 International Conference on Microelectronics, May 2004, vol. 2, pp. 525-529.

2003

  1. E. Zervakis, Y. Papananos, D. Loukas, N. Haralabidis, and A. Pavlidis, "Development of a high count rate readout system based on a fast, linear transimpedance amplifier for x-ray imaging," in 2003 IEEE Nuclear Science Symposium Conference Record, Oct. 2003, vol. 2, pp. 1275-1279.
  2. E. Zervakis, D. Loukas, N. Haralabidis, and A. Pavlidis, "Prototype implementation of a CMOS current mode readout ASIC for X-ray imaging applications," in Proc. 2003 IEEE International Conference on Electronics, Circuits and Systems, Dec. 2003, vol. 2, pp. 910-913.
  3. E. Zervakis, D. Loukas, N. Haralabidis, and A. Pavlidis, "A low noise-high counting rate readout system for X-ray imaging applications," in Proc. 2003 International Symposium on Signals, Circuits and Systems, July 2003, vol. 2, pp. 361-364.
  4. N. Naskas and Y. Papananos, "A new non-iterative, adaptive baseband predistortion method for high power RF amplifiers," in Proc. 2003 IEEE International Symposium on Circuits and Systems, May 2003, vol. 1, pp. 413-416.
  5. E. Zervakis, D. Loukas, N. Haralabidis, and A. Pavlidis, "Development of a CMOS low-noise analog front-end ASIC for X-ray imaging applications," in Proc. 2003 IEEE International Symposium on Circuits and Systems, May 2003, vol. 4, pp. 764-767.
  6. N. Nastos and Y. Papananos, "Integrated inductors over MOSFETs - experimental results of a three dimensional integrated structure," in Proc. 2003 IEEE International Symposium on Circuits and Systems, May 2003, vol. 1, pp. 57-60.
  7. N. Naskas and Y. Papananos, "An adaptive power amplifier lineariser based on a multilayer perceptron," in Proc. 2003 IEEE Semiannual Vehicular Technology Conference, Apr. 2003, vol. 2, pp. 1331-1334.

2002

  1. M. Bucher, D. Kazazis, F. Krummenacher, D. Binkley, D. Foty, and Y. Papananos, "Analysis of transconductances at all levels of inversion in deep submicron CMOS," in Proc. 2002 IEEE International Conference on Electronics, Circuits and Systems, Sep. 2002, vol. 3, pp. 1183-1186.
  2. N. Naskas and Y. Papananos, "Adaptive baseband predistorter for radio frequency power amplifiers based on a multilayer perceptron," in Proc. 2002 IEEE International Conference on Electronics, Circuits and Systems, Sep. 2002, vol. 3, pp. 1107-1110.
  3. N. Nastos and Y. Papananos, "High frequency operation of a MOSFET under an integrated inductor's magnetic field," in Proc. 2002 IEEE International Conference on Electronics, Circuits and Systems, Sep. 2002, vol. 2, pp. 615-618.
  4. E. Zervakis and N. Haralabidis, "A fast 0.25um CMOS current-mode front-end stage for solid state detector interfaces," in Proc. 2002 IEEE International Conference on Electronics, Circuits and Systems, Sep. 2002, vol. 1, pp. 243-246.
  5. N. Naskas and Y. Papananos, "Baseband predistorter for radio frequency power amplifiers based on a non-iterative, fast adaptation method," in Proc. 2002 IEEE International Conference on Electronics, Circuits and Systems, Sep. 2002, vol. 1, pp. 117-120.

2001

  1. N. Nastos and Y. Papananos, "A CAD tool for benchmarking MOSFET models," in Proc. 2001 IEEE International Symposium on Circuits and Systems, May 2001, vol. 5, pp. 475-478.

2000

  1. Y. K. Koutsoyannopoulos and Y. Papananos, "Systematic analysis and modeling of integrated inductors and transformers in RF IC design," IEEE Trans. Circuits Syst. II, vol. 47, pp. 699-713, Aug. 2000.
  2. A. Kyranas and Y. Papananos, "A 5 GHz fully integrated VCO in a SiGe bipolar technology," in Proc. 2000 IEEE International Symposium on Circuits and Systems, May 2000, vol. 5, pp. 193-196.
  3. T. Georgantas, S. Bouras, Y. Papananos, and D. Dervenis, "Switched-current �� modulator for baseband channel applications," in Proc. 2000 IEEE International Symposium on Circuits and Systems, May 2000, vol. 4, pp. 413-416.
  4. Y. Koutsoyannopoulos, Y. Papananos, S. Bantas, and C. Alemanni, "Performance limits of planar and multi-layer integrated inductors," in Proc. 2000 IEEE International Symposium on Circuits and Systems, May 2000, vol. 2, pp. 160-163.
  5. A. Kyranas and Y. Papananos, "Design issues of fully integrated RF VCOs," in Proc. 2000 Microelectronics Microsystems Nanotechnology.
  6. N. Nastos and Y. Papananos, "MOSFET model benchmarking using a novel CAD tool", in Proc. 2000 Microelectronics Microsystems Nanotechnology.
  7. N. Naskas and Y. Papananos, "Power amplifier linearization techniques: An overview," in Proc. 2000 Microelectronics Microsystems Nanotechnology, pp. 321-324.

1999

  1. S. Bouras, T. Georgantas, Y. Papananos, and D. Dervenis, "Current mode baseband interface for communication applications," in Proc. 1999 IEEE International Conference on Electronics, Circuits and Systems, Sep. 1999, vol. 1, pp. 533-536.
  2. T. Georgantas, S. Bouras, D. Dervenis, and Y. Papananos, "A comparison between integrated current and voltage mode filters for baseband applications," in Proc. 1999 IEEE International Conference on Electronics, Circuits and Systems, Sep. 1999, vol. 1, pp. 485-488.
  3. S. Bantas, Y. Papananos, and Y. Koutsoyannopoulos, "CMOS tunable bandpass RF filters utilizing coupled on-chip inductors," in Proc. 1999 IEEE International Symposium on Circuits and Systems, May 1999, vol. 2, pp. 581-584.
  4. Y. Koutsoyannopoulos, Y. Papananos, S. Bantas, and C. Alemanni, "Novel Si integrated inductor and transformer structures for RF IC design," in Proc. 1999 IEEE International Symposium on Circuits and Systems, May 1999, vol. 2, pp. 573-576.

1998

  1. S. Bouras, M. Kotronakis, K. Suyama, and Y. Tsividis, "Mixed analog-digital fuzzy logic controller with continuous-amplitude fuzzy inferences and defuzzification," IEEE Trans. Fuzzy Syst., vol. 6, pp. 205-215, May 1998.
  2. Y. Koutsoyannopoulos and Y. Papananos, "Efficient utilization of on-chip inductors in silicon RF IC design using a novel CAD tool; the LNA paradigm," in Proc. 1998 IEEE International Symposium on Circuits and Systems, June 1998, vol. 6, pp. 118-121.
  3. A. Kyranas and Y. Papananos, "Design issues towards the integration of passive components in silicon RF VCOs," in Proc. 1998 IEEE International Symposium on Circuits and Systems, June 1998, vol. 2, pp. 311-314.

1997

  1. Y. Papananos, T. Georgantas, and Y. Tsividis, "Design considerations and implementation of very low frequency continuous-time CMOS monolithic filters," Proc. IEE Circuits, Devices and Systems, vol. 144, pp. 68-74, Apr. 1997.
  2. S. Bouras and Y. Tsividis, "Center-of-gravity defuzzification without multiplication," IEICE Transactions on Fundamental of Electronics, Communications and Computer Sciences, vol. E80, pp. 769-770, Apr. 1997.
  3. K. Vavelidis, Y. P. Tsividis, F. O. Eynde, and Y. Papananos, "Six-terminal MOSFET's: modeling and applications in highly linear, electronically tunable resistors," IEEE J. Solid-State Circuits, vol. 32, pp. 4-12, Jan. 1997.
  4. Y. Koutsoyannopoulos, Y. Papananos, C. Alemanni, and S. Bantas, "A generic CAD model for arbitrarily shaped and multi-layer integrated inductors on silicon substrates," in Proc. 1997 IEEE European Solid-State Circuits Conference, Sep. 1997, pp. 320-323.
  5. S. Bantas and Y. Papananos, "A uW-power continuous-time current-mode filter in a digital CMOS process," in Proc. 1997 IEEE International Conference on VLSI and CAD, pp. 346-348.
  6. Y. Koutsoyannopoulos and Y. Papananos, "A CAD tool for simulating the performance of polygonal and multi-layer integrated inductors on silicon substrates," IEEE in Proc. 1997 IEEE International Conference on VLSI and CAD, pp. 244-246.

1996

  1. S. Pipilos, Y. P. Tsividis, J. Fenk, and Y. Papananos, "A Si 1.8 GHz RLC filter with tunable center frequency and quality factor," IEEE J. Solid-State Circuits, vol. 31, pp. 1517-1525, Oct. 1996.
  2. Y. Papananos and Y. Tsividis, "Design and implementation of a CMOS operational amplifier architecture with dual common-mode feedback loop," in Proc. 1996 IEEE International Conference on Electronics, Circuits and Systems, Oct. 1996, vol. 2, pp. 904-907.
  3. C. Dupuy, J. E. Franca, C. Azeredo Leme, F. Maloberti, R. Rivoir, G. Torelli, and Y. Papananos, "ALCD-analog libraries on CMOS digital process," in Proc. 1996 IEEE International Conference on Electronics, Circuits and Systems, Oct. 1996, vol. 1, pp. 618-622.
  4. Y. Papananos, T. Georgantas, and Y. Tsividis, "Design considerations and implementation of very low frequency continuous-time CMOS monolithic filters", in Proc. 1996 IEEE International Conference on Electronics, Circuits and Systems, Oct. 1996, vol. 1, pp. 223-226.
  5. S. Bouras, K. Suyama, and Y. Tsividis, "Integrated fuzzy logic controller with continuous processing," in Proc. 1996 IEEE International Conference on Fuzzy Systems, Sep. 1996, vol. 3, pp. 1951-1957.
  6. S. Pipilos, Y. Tsividis, and J. Fenk, "1.8 GHz tunable filter in Si technology," in Proc. 1996 IEEE Custom Integrated Circuits Conference, May 1996, pp. 189-192.

1995

  1. Y. Tsividis, K. Suyama, and K. Vavelidis, "Simple `reconciliation' MOSFET model valid in all regions," IEE Electronics Letters, vol. 31, pp. 506-508, Mar. 1995.

1994

  1. Y. Tsividis and Y. Papananos, "Continuous-time filters using buffers with gain lower than unity," IEE Electronics Letters, vol. 30, pp. 629-630, Apr. 1994.
  2. S. Pipilos and Y. Tsividis, "RLC active filters with electronically tunable centre frequency and quality factor," IEE Electronics Letters, vol. 30, pp. 472-474, Mar. 1994.
  3. S. Pipilos and Y. Tsividis, "Design of active RLC integrated filters with application in the GHz range," in Proc. 1994 IEEE International Symposium on Circuits and Systems, May 1994, vol. 5, pp. 645-648.

1993

  1. K. Vavelidis and Y. Tsividis, "R-MOSFET structure based on current division," IEE Electronics Letters, vol. 29, pp. 732-733, Apr. 1993.
  2. Y. Tsividis and K. Vavelidis, "Comment on `Linear, electronically tunable resistor'," IEE Electronics Letters, vol. 29, pp. 556-557, Mar. 1993.
  3. T. Georgantas, Y. Papananos, and Y. Tsividis, "A comparative study of five integrator structures for monolithic continuous-time filters: A tutorial," in Proc. 1993 IEEE International Symposium on Circuits and Systems, May 1993, vol. 2, pp. 1259-1262.
  4. K. Vavelidis and Y. Tsividis, "Design considerations for a highly linear electronically tunable resistor," in Proc. 1993 IEEE International Symposium on Circuits and Systems, May 1993, vol. 2, pp. 1180-1183.

1992

  1. Y. Tsividis and K. Vavelidis, "Linear, electronically tunable resistor," IEE Electronics Letters, vol. 28, pp. 2303-2305, Dec. 1992.

1991

  1. Y. Papananos and D. Anastassiou, "Analysis and VLSI architecture of a nonlinear edge-preserving noise-smoothing image filter," Proc. IEE Circuits, Devices and Systems G, vol. 28, pp. 433-440, Aug. 1991.


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